直播信息
报告信息
报告1：Can Two-Dimensional Materials Serve for Future Electronics?
报告人：Lain-Jong (Lance) Li，University of Hong Kong
报告2：Heterogeneous integration of ultrahigh-κ perovskite membranes for two-dimensional electronics
报告人：Jing-Kai Huang，University of New South Wales (AU)
报告时间
2022年6月2日（星期四）10:00
主办方
香港中文大学
香港材料研究学会
Can Two-Dimensional Materials Serve for Future Electronics?
Speaker: Prof. Lain-Jong (Lance) Li
Biosketch: Dr. Lain-Jong (Lance) Li joined HKU as a Chair Professor in nanomaterials for next-generation devices. He served as a Research Director in Corporate Research at Taiwan Semiconductor Manufacturing Company (TSMC) from 2017 to 2020.
Experiences: He received his BSc and an MSc in chemistry at National Taiwan University. He obtained his PhD in condensed matter physics at Oxford University in 2006. He was an Assistant Professor in Nanyang Technological University Singapore (2006-2009). Since 2010, he has become an Associate Professor at Academia Sinica Taiwan. He joined King Abdullah University of Science and Technology (KAUST) in 2014 and became a full Professor in 2016. He became the adjunct SHARP Professor at Univ. of New South Wales (Sydney) in 2017. He is recognized as the highly cited scholar (Clarivate) since 2018 and Universal Scientific Education and Research Network (USERN) 1% top scientist. He has published more than 380 SCI journal articles with around 40,000 citations.
Research interests: Two-dimensional materials (graphene, boron nitrides, transition metal dichalcogenides etc) hold promises in replacing silicon-based technology for manufacturing low-energy-consuming nanoelectronics. However, one of the major bottlenecks that prevent their seeming-less integration with current micro/nanoelectronics technologies is a lack of reproducible approach for wafer-scale synthesis of uniform, single crystalline membranes of these two-dimensional materials. His research is primarily focusing on solving these grand challenges from material and device perspectives for advancing future electronics and extending the Moore’s Law.
Abstract: With the dimension scaling in dimension, the transistor gate controllability becomes weaker owing to the pronounced source-drain tunneling. Hence, the transistor body thickness needs to be reduced to ensure efficient electrostatic control. New materials such as “ultra-thin” 2D semiconducting materials have attracted attention. In this short talk, I would like to provide our analysis and arguments on the possibility to scale the device dimension, for example down to N1 technology node, using transition metal dichalcogenides (TMD) semiconductors. Challenges on materials growth and device fabrication, as well as the progresses shall be discussed.
Heterogeneous integration of ultrahigh-κ perovskite membranes for two-dimensional electronics
Speaker: Jing-Kai Huang
Biosketch: Dr. Huang earned his PhD degree under Scientia Scholarship scheme, the most competitive scholarship in Australia, with professional experience in nanofabrication of ultra-scaled electronic devices and strong research expertise in heterogeneous integration of 2D materials, complex oxides, and metalorganic frameworks (MOFs) for future electronic manufacturing. Currently he serves as Lecturer/Research Associate (level B) in School of Materials Science and Engineering at UNSW.
Abstract: Two-dimensional semiconductors can be used to build next-generation electronic devices with ultrascaled channel lengths. However, the integration of high-dielectric-constant (κ) materials with 2D semiconductor channels, while scaling their capacitance equivalent thickness (CET), has proved challenging. Here we explore transferrable ultrahigh-κ single-crystalline perovskite strontium-titanium-oxide membranes as a gate dielectric for 2D field-effect transistors. Perovskite gating exhibits a desirable sub-1 nm CET with a low leakage current (less than 10−2 A/cm2at 2.5 MV/cm). We find that the van der Waals gap between strontium-titanium-oxide dielectrics and 2D semiconductors mitigates the unfavorable fringing-induced barrier-lowering effect resulting from the use of very high-κ dielectrics. Typical short-channel transistors made of scalable molybdenum-disulfide films by chemical vapor deposition and strontium-titanium-oxide dielectrics exhibit steep subthreshold swings down to about 70 mV/dec and on/off current ratios up to 107, which matches the low-power specifications suggested by the latest International Roadmap for Devices and Systems (IRDS)
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